Date: Wed, 20 Nov 1996 20:12:52 GMT
Server: Apache/1.1.1+
Content-type: text/html
Content-length: 5675
Last-modified: Thu, 03 Oct 1996 19:19:33 GMT

<!doctype html "-//IETF//DTD HTML 3.0//EN">
<html>
<head>
<title>Avalanche Scalable Parallel Processor Project</title>
</head>

<body background="background.gif">

<!-- ********************************************************************* -->
<!-- Date: Mon, 13 Nov 1995 15:56:40 -0700				   -->
<!-- To: avalanche@jensen						   -->
<!-- From: sroberts@cs (Susan Roberts)					   -->
<!-- Subject: Research Pages for the Dept. of Computer Science		   -->

<!-- I am working on the Department Computer Science Web pages and am in   -->
<!-- the process of putting standardized headings and footings on all of   -->
<!-- the Department pages.  You can look at the pages at		   -->
<!-- http://www.cs.utah.edu/outreach/ as an example.  Bill Thompson has	   -->
<!-- requested that I ask you to place these standardized headings and	   -->
<!-- footings on your research page.					   -->

<!-- All you need to do is copy the following header and place it directly -->
<!-- at the top of the page, above the logo:				   -->

<hr>
<h2>University of Utah<br>
Department of Computer Science
</h2>
<hr>

<center>
<!WA0><a href="http://www.cs.utah.edu/cgi-bin/imagemap/projects/avalanche/clickmap/Avalanche1.map">
	<!WA1><img src="http://www.cs.utah.edu/projects/avalanche/Avalanche1.gif" ISMAP BORDER=0>
</a>
</center>
<hr>
<p>
<!-- **************************************************************************** -->
<p>
<font size=4>
The goal of the <strong>Avalanche</strong> project is to enable the
construction of usable and truly scalable parallel computing platforms
that are not exorbitantly expensive, yet are still capable of
achieving peta-op performance levels.<P>

<em>Low communication latency</em> is the key to achieving
performance scalability for both of the common parallel computation models,
namely <em>Message Passing</em> and <em>Distributed Shared Memory</em>.
Toward this end, we are developing a memory architecture that tightly
integrates the processor, the entire memory hierarchy, and the
interconnect fabric.<P>

The core of the effort is the development of a new
<a name="CSCCU"><em>Cache and Communication Controller Unit</em></a>
(CCCU) for the
<em><!WA2><a href="http://www.hp.com/">Hewlett-Packard</a></em>
<strong>PA</strong> 8000 CPU and the Myrinet network fabric (from
<em><!WA3><a href="http://www.myri.com/">Myricom Inc</a></em>).

The CCCU will inject incoming data traffic into the "appropriate level"
of the memory hierarchy to minimize message latency and cache miss
penalties.  Furthermore, it supports a flexible suite of cache
coherence protocols for DSM applications <p>

In order to achieve reasonable cost it is necessary to adopt an
approach that takes advantage of the significant performance
advantages and momentum already provided by commercial microprocessor
and interconnect fabric development efforts.<p>

The target for the project is a 64 processing element prototype
which will be constructed in the final year of the
<em><!WA4><a href="http://www.arpa.mil/">ARPA</a></em>
(<em><!WA5><a href="http://www.csto.arpa.mil/CSTOWelcome.html">CSTO</a></em>)
/ <em><!WA6><a href="http://dolomite.spawar.navy.mil/">SPAWAR</a></em>
supported project duration.

</font>
<p>

<hr> <!-------------------------------------------------------------------->

<center>
<font size=+2>
<!- Vestigial link support for broken Mosaic tables ->
[ <!WA7><a href="http://www.cs.utah.edu/projects/avalanche/avalanche-status-reports.html">Status Reports</a>
| <!WA8><a href="http://www.cs.utah.edu/projects/avalanche/avalanche-publications.html">Publications</a>
| <!WA9><a href="http://www.cs.utah.edu/projects/avalanche/avalanche-personnel.html">Personnel</a>
| <!WA10><a href="http://www.cs.utah.edu/projects/flux/facilities.html">Facilities</a>
| <!WA11><a href="http://www.cs.utah.edu/projects/avalanche/avalanche-related-projects.html">Related Sites</a>
] <br>
</font>
</center>

<!-- **************************************************************************** -->
<!-- For the footer, you can insert the following at the very bottom of the page: -->
<hr>
<center>
<nobr>
<!WA12><a href="http://www.cs.utah.edu/">
<!WA13><img border=0 src="http://www.cs.utah.edu/projects/icons/dept_cs_button.gif"></a>
<!WA14><a href="http://www.cs.utah.edu/projects/">
<!WA15><img border=0 src="http://www.cs.utah.edu/projects/icons/research_cs_button.gif"></a>
</nobr>
</center>
<hr>
<address> Feedback to:
<!WA16><a href="mailto:avalanche@jensen.cs.utah.edu">avalanche@jensen.cs.utah.edu</a><br>
</address>

<!-- I have created "buttons" in the form of gifs, which are located at	   -->
<!-- /afs/cs.utah.edu/www/htdocs/projects/icons/			   -->
<!--  The button dept_cs_button.gif is used to linked to the Dept. of CS   -->
<!-- Home Page (at /afs/cs.utah.edu/www/htdocs/projects/)		   -->
<!--  the button research_cs_button.gif is used to link to the Dept of CS  -->
<!-- Research groups							   -->
<!--  and projects page (at /afs/cs.utah.edu/www/htdocs/projects/)	   -->


<!-- If you have any questions, please let me know.			   -->

<!-- thank you,								   -->
<!-- Susan								   -->
<!-- **************************************************************************** -->
Last modified around November 13, 1995.
<hr> <!-------------------------------------------------------------------->
<font size=-1>
This work was sponsored by the
<!WA17><a href="http://dolomite.spawar.navy.mil/">Space and Naval Warfare Systems Command (SPAWAR)
</a> and
<!WA18><a href="http://www.arpa.mil/">Advanced Research Projects Agency (ARPA)</a>,
Communication and Memory Architectures for
<!WA19><a href="http://www.csto.arpa.mil/ResearchAreas/Scalable_Systems_and_Software/Prototype_Scalable_Systems.html">Scalable Parallel Computing</a>,
ARPA order #B990 under SPAWAR contract #N00039-95-C-0018.
</font>

</body>
</html>

<!-- $Date: 1996/01/24 06:01:42 $ GMT -->
<!-- Copyright 1995 Computer Science Laboratory -->
<!-- Department of Computer Science, University of Utah -->
<!-- all rights reserved. -->
